ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
We report on the design of a prototyping component for the theorem prover Isabelle/HOL. Specifications consisting of datatypes, recursive functions and inductive definitions are co...
In this paper we provide a systematic formal interpretation for most elements of the UML notation. This interpretation, in a structured temporal logic, enables precise analysis of...
We survey all known results in the area of quasigroup and loop theory to have been obtained with the assistance of automated theorem provers. We provide both informal and formal d...
We develop a formal semantics of sequence diagrams. The semantics is given in terms of our new temporal logic, named HDTL, which is designed to specify dynamically evolving system...
Seung Mo Cho, Hyung-Ho Kim, Sung Deok Cha, Doo-Hwa...