104 search results - page 13 / 21 » Formal Design and Analysis of a Gear Controller |
HPCA
2000
IEEE
14 years 1 days ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specif...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
TASE
2008
IEEE
13 years 7 months ago
2008
IEEE
In this paper we deal with the problem of modeling railway networks with Petri nets so as to apply the theory of supervisory control for discrete event systems to automatically de...
ISSTA
2010
ACM
13 years 11 months ago
2010
ACM
Program control dependence has substantial impact on applications such as dynamic information flow tracking and data lineage tracing (a technique tracking the set of inputs that ...