1784 search results - page 17 / 357 » Formal Models for Embedded System Design |
FDL
2007
IEEE
14 years 2 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
ACSD
2004
IEEE
13 years 11 months ago
2004
IEEE
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc s...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Performance analysis has many advantages in theory compared to simulation for the validation of complex embedded systems, but is rarely used in practice. To make analysis more att...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
The synchronous modeling paradigm provides strong execution correctness guarantees to embedded system design while making minimal environmental assumptions. In most related framew...
ISOLA
2010
Springer
13 years 6 months ago
2010
Springer
Abstract. This article deals with performance verifications of architecture models of real-time embedded systems. We focus on models verified with the real-time scheduling theory...