726 search results - page 8 / 146 » Formal Verification and Validation of Interactive Systems Sp... |
ASM
2008
ASM
13 years 10 months ago
2008
ASM
As systems become ever more complex, verification becomes more main stream. Event-B and Alloy are two formal specification languages based on fairly different methodologies. While...
CSREAESA
2004
13 years 9 months ago
2004
In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
DSD
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
ACSD
2009
IEEE
13 years 11 months ago
2009
IEEE
Protocol conversion deals with the automatic synthesis of an additional component, often referred to as an adaptor or a converter, to bridge mismatches between interacting compone...
FM
1997
Springer
14 years 17 days ago
1997
Springer
: The widely accepted possible benefits of formal methods on the one hand and their minor use compared to informal or graphical description techniques on the other hand have repeat...