Sciweavers

1446 search results - page 107 / 290
» Formal analysis of hardware requirements
Sort
View
ASPDAC
2009
ACM
143views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Statistical modeling and analysis of chip-level leakage power by spectral stochastic method
In this paper, we present a novel statistical full-chip leakage power analysis method. The new method can provide a general framework to derive the full-chip leakage current or po...
Ruijing Shen, Ning Mi, Sheldon X.-D. Tan, Yici Cai...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 4 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
ISPD
2004
ACM
161views Hardware» more  ISPD 2004»
14 years 3 months ago
Early-stage power grid analysis for uncertain working modes
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
14 years 2 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
ATVA
2006
Springer
99views Hardware» more  ATVA 2006»
14 years 2 months ago
Whodunit? Causal Analysis for Counterexamples
Although the counterexample returned by a model checker can help in reproducing the symptom related to a defect, a significant amount of effort is often required for the programmer...
Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gup...