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» Formal analysis of hardware requirements
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ICDCS
2007
IEEE
14 years 5 months ago
Overlay Node Placement: Analysis, Algorithms and Impact on Applications
Abstract— Overlay routing has emerged as a promising approach to improving performance and reliability of Internet paths. To fully realize the potential of overlay routing under ...
Sabyasachi Roy, Himabindu Pucha, Zheng Zhang, Y. C...
DFT
2003
IEEE
145views VLSI» more  DFT 2003»
14 years 4 months ago
System-Level Analysis of Fault Effects in an Automotive Environment
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
Fulvio Corno, S. Tosato, P. Gabrielli
VTS
2007
IEEE
116views Hardware» more  VTS 2007»
14 years 5 months ago
Case Study: Soft Error Rate Analysis in Storage Systems
Soft errors due to cosmic particles are a growing reliability threat for VLSI systems. In this paper we analyze the soft error vulnerability of FPGAs used in storage systems. Sinc...
Brian Mullins, Hossein Asadi, Mehdi Baradaran Taho...
ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
14 years 4 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
PRDC
1999
IEEE
14 years 3 months ago
Networked Windows NT System Field Failure Data Analysis
This paper presents a measurement-based dependability study of a Networked Windows NT system based on field data collected from NT System Logs from 503 servers running in a produc...
Jun Xu, Zbigniew Kalbarczyk, Ravishankar K. Iyer