1446 search results - page 59 / 290 » Formal analysis of hardware requirements |
DDECS
2006
IEEE
14 years 26 days ago
2006
IEEE
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
CAV
2000
Springer
14 years 24 days ago
2000
Springer
Hierarchical state machines is a popular visual formalism for software specifications. To apply automated analysis to such specifications, the traditional approach is to compile th...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
Failure Mode and Effects Analysis (FMEA) is a wellknown technique widely used for safety assessment in the area of safety-critical systems. However, FMEA is traditionally done man...
SBACPAD
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper presents a theoretical study to evaluate the performance of a family of parallel implementations of the propagation algorithm. The propagation algorithm is used to an i...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Practitioners of formal property verification often work around the capacity limitations of formal verification tools by breaking down properties into smaller properties that ca...