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EMSOFT
2009
Springer
14 years 1 months ago
Formal and executable contracts for transaction-level modeling in SystemC
Tayeb Bouhadiba, Florence Maraninchi, Giovanni Fun...
CODES
2005
IEEE
14 years 29 days ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 19 days ago
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...
ACSD
2005
IEEE
121views Hardware» more  ACSD 2005»
14 years 1 months ago
LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level
We describe a toolbox for the analysis of Systems-on-achip described in SystemC at the transactional level. The tools are able to extract information from SystemC code, and to bui...
Matthieu Moy, Florence Maraninchi, Laurent Maillet...
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 19 days ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen