299 search results - page 43 / 60 » Formal verification of analog designs using MetiTarski |
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
BIRTHDAY
2009
Springer
13 years 5 months ago
2009
Springer
Analytical models are a fundamental tool in the development of computer-based systems of every kind: their essential purpose is to support human understanding and reasoning in deve...
BCS
2008
13 years 8 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...