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ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
14 years 22 days ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
DATE
2006
IEEE
101views Hardware» more  DATE 2006»
14 years 1 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
FASE
2000
Springer
13 years 11 months ago
More About TAS and IsaWin - Tools for Formal Program Development
We present a family of tools for program development and verification, comprising the transformation system TAS and the theorem proving interface IsaWin. Both are based on the theo...
Christoph Lüth, Burkhart Wolff
FDL
2004
IEEE
13 years 11 months ago
A Functional Programming Framework of Heterogeneous Model of Computation for System Design
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shu...
DATE
1999
IEEE
134views Hardware» more  DATE 1999»
13 years 11 months ago
Verifying Imprecisely Working Arithmetic Circuits
If real number calculations are implemented as circuits, only a limited preciseness can be obtained. Hence, formal verification can not be used to prove the equivalence between th...
Michaela Huhn, Klaus Schneider, Thomas Kropf, Geor...