In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Security policies are abstract descriptions of how a system should behave to be secure. They typically express what is obligatory, permitted, or forbidden in the system. When the s...
In this paper, a proof assistant, called SAD, is presented. SAD deals with mathematical texts that are formalized in the ForTheL language (brief description of which is also given)...
Konstantin Verchinine, Alexander V. Lyaletski, And...
Most flight software testing at the Jet Propulsion Laboratory relies on the use of hand-produced test scenarios and is executed on systems as similar as possible to actual mission...