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CSREAESA
2004
13 years 8 months ago
Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications
In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
Lubomir Ivanov
ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler
EGCDMAS
2004
147views ECommerce» more  EGCDMAS 2004»
13 years 8 months ago
Should We Prove Security Policies Correct?
Security policies are abstract descriptions of how a system should behave to be secure. They typically express what is obligatory, permitted, or forbidden in the system. When the s...
Sebastiano Battiato, Giampaolo Bella, Salvatore Ri...
CADE
2007
Springer
14 years 7 months ago
System for Automated Deduction (SAD): A Tool for Proof Verification
In this paper, a proof assistant, called SAD, is presented. SAD deals with mathematical texts that are formalized in the ForTheL language (brief description of which is also given)...
Konstantin Verchinine, Alexander V. Lyaletski, And...
ICSE
2007
IEEE-ACM
14 years 7 months ago
Randomized Differential Testing as a Prelude to Formal Verification
Most flight software testing at the Jet Propulsion Laboratory relies on the use of hand-produced test scenarios and is executed on systems as similar as possible to actual mission...
Alex Groce, Gerard J. Holzmann, Rajeev Joshi