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» Framework for Fault Analysis and Test Generation in DRAMs
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ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
DAC
2006
ACM
14 years 8 months ago
Unknown-tolerance analysis and test-quality control for test response compaction using space compactors
For a space compactor, degradation of fault detection capability caused by the masking effects from unknown values is much more serious than that caused by error masking (i.e. ali...
Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon W...
ICSOC
2010
Springer
13 years 5 months ago
Programmable Fault Injection Testbeds for Complex SOA
Abstract. The modularity of Service-oriented Architectures (SOA) allows to establish complex distributed systems comprising e.g., services, clients, brokers, and workflow engines. ...
Lukasz Juszczyk, Schahram Dustdar
ESE
2006
100views Database» more  ESE 2006»
13 years 7 months ago
An evaluation of combination strategies for test case selection
This paper presents results from a comparative evaluation of five combination strategies. Combination strategies are test case selection methods that combine "interesting&quo...
Mats Grindal, Birgitta Lindström, Jeff Offutt...
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
13 years 11 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey