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CODES
2007
IEEE
14 years 3 months ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
UIST
2006
ACM
14 years 2 months ago
RecipeSheet: creating, combining and controlling information processors
Many tasks require users to extract information from diverse sources, to edit or process this information locally, and to explore how the end results are affected by changes in th...
Aran Lunzer, Kasper Hornbæk
HUMAN
2003
Springer
14 years 1 months ago
Admission Control for TCP Connections in QoS IP Network
The paper describes a new admission control (AC) algorithm for greedy TCP connections. The algorithm has passed positive tests in preproduction QoS IP network [2], developed inside...
Wojciech Burakowski, Halina Tarasiuk
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
14 years 22 days ago
Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits
Power gating has been widely used to reduce subthreshold leakage. However, its efficiency degrades very fast with technology scaling due to the gate leakage of circuits specific t...
Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun ...
PE
2006
Springer
95views Optimization» more  PE 2006»
13 years 8 months ago
Deterministic end-to-end delay guarantees with rate controlled EDF scheduling
Quality of Service (QoS) in terms of end-to-end delay guarantees to real-time applications is an important issue in emerging broadband packet networks. Earliest Deadline First (ED...
Vijay Sivaraman, Fabio M. Chiussi, Mario Gerla