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LICS
2006
IEEE
14 years 1 months ago
Variables as Resource in Hoare Logics
Hoare logic is bedevilled by complex but coarse side conditions on the use of variables. We define a logic, free of side conditions, which permits more precise statements of a pr...
Matthew J. Parkinson, Richard Bornat, Cristiano Ca...
ICCAD
1998
IEEE
101views Hardware» more  ICCAD 1998»
13 years 11 months ago
Wireplanning in logic synthesis
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alb...
FORMATS
2010
Springer
13 years 5 months ago
From Mtl to Deterministic Timed Automata
Abstract. In this paper we propose a novel technique for constructing timed automata from properties expressed in the logic MTL, under bounded-variability assumptions. We handle fu...
Dejan Nickovic, Nir Piterman
ESWS
2008
Springer
13 years 9 months ago
WSMO Choreography: From Abstract State Machines to Concurrent Transaction Logic
tract State Machines to Concurrent Transaction Logic Dumitru Roman1 , Michael Kifer2 , and Dieter Fensel1 1 STI Innsbruck, Austria 2 State University of New York at Stony Brook, US...
Dumitru Roman, Michael Kifer, Dieter Fensel
PLPV
2011
ACM
12 years 10 months ago
Local actions for a curry-style operational semantics
Soundness proofs of program logics such as Hoare logics and type systems are often made easier by decorating the operational semantics with information that is useful in the proof...
Gordon Stewart, Andrew W. Appel