18 search results - page 1 / 4 » From multi-clocked synchronous processes to latency-insensit... |
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
TCAD
2008
13 years 6 months ago
2008
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
EMSOFT
2005
Springer
14 years 13 days ago
2005
Springer
We consider the problem of synthesizing correct-by-construction globally asynchronous, locally synchronous (GALS) implementations from modular synchronous specifications. This in...
ICMCS
2009
IEEE
13 years 4 months ago
2009
IEEE
In this paper, the development of a framework based on the Realtime Database (RTDB) for processing multimodal data is presented. This framework allows readily integration of input...
TIP
2010
13 years 1 months ago
2010
We present a new framework for data hiding in images printed with clustered dot halftones. Our application scenario, like other hardcopy embedding methods, encounters fundamental c...