32 search results - page 5 / 7 » Fsimac: a fault simulator for asynchronous sequential circui... |
CHARME
1995
Springer
14 years 3 days ago
1995
Springer
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
1 The first path implicit and exact non–robust path delay fault grading technique for non–scan sequential circuits is presented. Non enumerative exact coverage is obtained, b...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
ICCAD
1995
IEEE
14 years 3 days ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
EURODAC
1995
IEEE
14 years 3 days ago
1995
IEEE
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...