192 search results - page 14 / 39 » Functional Scan Chain Testing |
ET
2002
13 years 9 months ago
2002
Abstract. A novel approach for using an embedded processor to aid in deterministic testing of the other components of a system-on-a-chip (SOC) is presented. The tester loads a prog...
ASPDAC
2007
ACM
14 years 1 months ago
2007
ACM
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
DATE
2002
IEEE
14 years 2 months ago
2002
IEEE
A gate level, automated fault diagnosis scheme is proposed for scan-based BIST designs. The proposed scheme utilizes both fault capturing scan chain information and failing test v...
ATS
2005
IEEE
14 years 2 months ago
2005
IEEE
In the past, test data volume reduction techniques have concentrated heavily on scan test data content. However, functional vectors continue to be utilized because they target uni...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
Diagnosing failing vectors in a Built-In Self Test (BIST) environment is a difficult task because of the highly compressed signature coming out of the Multiple Input Shift Regist...