123 search results - page 8 / 25 » Functional Test Generation for FSMs by Fault Extraction |
ITC
1993
IEEE
13 years 11 months ago
1993
IEEE
This paper presents an efficient approach to generate tests for gate delay faults. Unlike other known algorithms which try to generate a 'good' delay test the presented ...
ATS
2003
IEEE
14 years 23 days ago
2003
IEEE
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error. A test generation methodology, called XGEN, was dev...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
- Two methods to apply tests to detect delay faults in standard scan designs are used. One is called launch off capture and the other is called launch off shift. Launch off shift t...