174 search results - page 8 / 35 » Functional Test Generation for Full Scan Circuits |
VLSID
1995
IEEE
14 years 2 months ago
1995
IEEE
TODAES
1998
13 years 10 months ago
1998
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
- Two methods to apply tests to detect delay faults in standard scan designs are used. One is called launch off capture and the other is called launch off shift. Launch off shift t...
TVLSI
2008
13 years 10 months ago
2008
We present a selective encoding method that reduces test data volume and test application time for scan testing of Intellectual Property (IP) cores. This method encodes the slices ...
EURODAC
1995
IEEE
14 years 2 months ago
1995
IEEE
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...