409 search results - page 4 / 82 » Functional Validation of Programmable Architectures |
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
VLSISP
2008
13 years 8 months ago
2008
Many different video processor architectures exist. Its architecture gives a processor strength for a particular application. Hardwired logic yields the best performance/cost, but ...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
ISCAS
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...