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» Functional Validation of Programmable Architectures
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ICALT
2005
IEEE
14 years 2 months ago
ActiveTutor
In this paper we present an architecture dedicated to an intelligently assisted educational tool which integrates within a unified framework software rational agents both at the m...
Jean Pierre Fournier
CODES
1999
IEEE
14 years 1 months ago
How standards will enable hardware/software co-design
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
Mark Genoe, Christopher K. Lennard, Joachim Kunkel...
JSA
2010
173views more  JSA 2010»
13 years 3 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...
DAC
2006
ACM
14 years 10 months ago
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
Xinping Zhu, Wei Qin
CODES
2005
IEEE
14 years 2 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra