409 search results - page 6 / 82 » Functional Validation of Programmable Architectures |
FPL
2007
Springer
14 years 2 months ago
2007
Springer
Programmable logic cores (PLCs) offer a means of providing post-fabrication re-configurability to a SoC design. Circuits implemented in a PLC will inevitably have lower timing per...
FPGA
2000
ACM
14 years 11 days ago
2000
ACM
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
When searching for functional bugs in silicon, debug data is acquired after a trigger event occurs. A trigger event can be configured at run-time using a set of control registers...
ASPLOS
2008
ACM
13 years 10 months ago
2008
ACM
The constant race for faster and more powerful CPUs is drawing to a close. No longer is it feasible to significantly increase the speed of the CPU without paying a crushing penalt...
VLSID
2007
IEEE
14 years 9 months ago
2007
IEEE
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...