396 search results - page 69 / 80 » Functional Validation of System Level Static Scheduling |
WETICE
2005
IEEE
14 years 1 months ago
2005
IEEE
System theory propagates the use of models which e level of abstraction to cope with complexity, evolving out of variety and connectivity. Different modeling techniques have been ...
GPCE
2008
Springer
13 years 8 months ago
2008
Springer
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
DAC
2006
ACM
14 years 1 months ago
2006
ACM
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...