Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
Equality logic with or without uninterpreted functions is used for proving the equivalence or refinement between systems (hardware verification, compiler’s translation, etc). C...
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic...
The paper presents an unified Description Logic (DL) model for databases. Describing database models using DLs is a fundamental problem in many areas because it turns databases to...