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DAC
2006
ACM
14 years 9 months ago
Topology aware mapping of logic functions onto nanowire-based crossbar architectures
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
DAC
2004
ACM
14 years 9 months ago
A method to decompose multiple-output logic functions
This paper shows a method to decompose a given multipleoutput circuit into two circuits with intermediate outputs. We use a BDD for characteristic function (BDD for CF) to represe...
Tsutomu Sasao, Munehiro Matsuura
CADE
2006
Springer
14 years 9 months ago
Partial Recursive Functions in Higher-Order Logic
Abstract. Based on inductive definitions, we develop an automated tool for defining partial recursive functions in Higher-Order Logic and providing appropriate reasoning tools for ...
Alexander Krauss
ICON
2007
IEEE
14 years 2 months ago
Definition and Implementation of Logical Function Blocks Compliant to ForCES Specification
—IETF ForCES (Forwarding and Control Element Separation) is defining specifications for interfaces and modular resources abstractions in open programmable network equipments. Acc...
Ligang Dong, Fenggen Jia, Weiming Wang
GLVLSI
2007
IEEE
167views VLSI» more  GLVLSI 2007»
14 years 3 months ago
A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Dariusz Kania