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DATE
2008
IEEE
66views Hardware» more  DATE 2008»
14 years 3 months ago
Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects
This paper presents a wrapper and TAM co-optimization method for reuse of SoC functional interconnects to minimize test time under area constraint. The proposed method consists of...
Tomokazu Yoneda, Hideo Fujiwara
SIAMJO
2010
62views more  SIAMJO 2010»
13 years 3 months ago
Generalized Hessians of C1, 1-Functions and Second-Order Viscosity Subjets
Given a C1,1
Luc Barbet, Aris Daniilidis, Pierpaolo Soravia
DELTA
2006
IEEE
14 years 2 months ago
Static Code Analysis of Functional Descriptions in SystemC
The co-design of hardware and software systems with object oriented design languages like SystemC has become very popular. Static analysis of those descriptions allows to conduct ...
Martin Holzer 0002, Markus Rupp
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
13 years 8 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
SC
1992
ACM
14 years 26 days ago
Heterogeneous Parallel Programming in Jade
This paper presents Jade, a high-level parallel programming language for managing coarse-grain concurrency. Jade simplifies programming by providing the programmer with the abstra...
Martin C. Rinard, Daniel J. Scales, Monica S. Lam