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» Functional simulation using binary decision diagrams
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ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
14 years 1 months ago
A fast logic simulator using a look up table cascade emulator
— This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascade...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura
GLVLSI
2002
IEEE
160views VLSI» more  GLVLSI 2002»
14 years 20 days ago
Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations
Spectral techniques have found many applications in computeraided design, including synthesis, verification, and testing. Decision diagram representations permit spectral coeffici...
Whitney J. Townsend, Mitchell A. Thornton, Rolf Dr...
DAC
1996
ACM
13 years 12 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
EVOW
2004
Springer
14 years 1 months ago
Disjoint Sum of Product Minimization by Evolutionary Algorithms
Recently, an approach has been presented to minimize Disjoint Sumof-Products (DSOPs) based on Binary Decision Diagrams (BDDs). Due to the symbolic representation of cubes for larg...
Nicole Drechsler, Mario Hilgemeier, Görschwin...
ICCD
2001
IEEE
176views Hardware» more  ICCD 2001»
14 years 4 months ago
BDD Variable Ordering by Scatter Search
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...
William N. N. Hung, Xiaoyu Song