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FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
14 years 1 months ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany
NIPS
2007
13 years 9 months ago
Random Sampling of States in Dynamic Programming
We combine three threads of research on approximate dynamic programming: sparse random sampling of states, value function and policy approximation using local models, and using lo...
Christopher G. Atkeson, Benjamin Stephens
ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Instruction set and functional unit synthesis for SIMD processor cores
—This paper focuses on SIMD processor synthesis and proposes a SIMD instruction set/functional unit synthesis algorithm. Given an initial assembly code and a timing constraint, t...
Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka,...
EUROGP
2000
Springer
116views Optimization» more  EUROGP 2000»
13 years 11 months ago
An Extrinsic Function-Level Evolvable Hardware Approach
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
Tatiana Kalganova
SIAMDM
2008
90views more  SIAMDM 2008»
13 years 7 months ago
Maximizing Supermodular Functions on Product Lattices, with Application to Maximum Constraint Satisfaction
Recently, a strong link has been discovered between supermodularity on lattices and tractability of optimization problems known as maximum constraint satisfaction problems. The pre...
Andrei A. Krokhin, Benoit Larose