We present an efficient algorithm to find an optimal integer solution of a given system of 2-variable equalities and 1-variable inequalities with respect to a given linear objectiv...
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
We present the first Utility Accrual (or UA) real-time scheduling algorithm for multiprocessors, called gMUA. The algorithm considers an application model where real-time activiti...
Hyeonjoong Cho, Haisang Wu, Binoy Ravindran, E. Do...
— To save power consumption, it has been shown that the clock signal can be gated without changing the functionality under certain clock-gating conditions. We observe that the cl...