171 search results - page 10 / 35 » Future Performance Challenges in Nanometer Design |
EUROMICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
When an organization faces new types of collaboration, for example after a company merger, there is a need to integrate the existing software. Two main process challenges are how ...
MSWIM
2005
ACM
14 years 29 days ago
2005
ACM
The substitution of ATM transport by IP in future UMTS Radio Access Networks (UTRAN) introduces several performance challenges that need to be addressed to guarantee the feasibili...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—As semiconductor manufacturing enters advanced nanometer design paradigm, aging and device wear-out related degradation is becoming a major concern. Negative Bias Temperature In...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
ISPD
2004
ACM
14 years 25 days ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...