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DAC
2007
ACM
14 years 12 months ago
Novel CNTFET-based Reconfigurable Logic Gate Design
This paper describes a family of novel dynamically reconfigurable logic gates based on double-gate carbon nanotube field-effect transistors which demonstrate p-type or n-type switc...
David Navarro, Frédéric Gaffiot, Ian...
DAC
2005
ACM
14 years 12 months ago
Designing logic circuits for probabilistic computation in the presence of noise
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
DAC
2005
ACM
14 years 27 days ago
TCAM enabled on-chip logic minimization
This paper presents an eļ¬ƒcient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory eļ¬...
Seraj Ahmad, Rabi N. Mahapatra
EVOW
2008
Springer
14 years 21 days ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
14 years 4 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton