268 search results - page 38 / 54 » Gating currents |
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
TIM
2010
13 years 2 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
TVLSI
2008
13 years 7 months ago
2008
-- Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep submicron regime. As a result, reducing the subthreshold a...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
-- Power-gating is a technique for efficiently reducing leakage power by shutting off the idle blocks. However, the presence of power-gating may also introduce negative effects on ...
EH
1999
IEEE
13 years 11 months ago
1999
IEEE
-- This paper describes the operation of a field programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (...