36 search results - page 6 / 8 » General Iteration graphs and Boolean automata circuits |
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...
CSCLP
2004
Springer
14 years 22 days ago
2004
Springer
We introduce a framework for studying and solving a class of CSP formulations. The framework allows constraints to be expressed as linear and nonlinear equations, then compiles th...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...