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DAC
2008
ACM
14 years 8 months ago
A framework for block-based timing sensitivity analysis
Since process and environmental variations can no longer be ignored in high-performance microprocessor designs, it is necessary to develop techniques for computing the sensitiviti...
Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S...
FMOODS
2007
13 years 9 months ago
Formal Modeling and Analysis of the OGDC Wireless Sensor Network Algorithm in Real-Time Maude
This paper describes the application of Real-Time Maude to the formal specification, simulation, and further formal analysis of the sophisticated state-of-the-art OGDC wireless se...
Peter Csaba Ölveczky, Stian Thorvaldsen
JPDC
2006
85views more  JPDC 2006»
13 years 7 months ago
Provable algorithms for parallel generalized sweep scheduling
We present provably efficient parallel algorithms for sweep scheduling, which is a commonly used technique in Radiation Transport problems, and involves inverting an operator by i...
V. S. Anil Kumar, Madhav V. Marathe, Srinivasan Pa...
DAC
2004
ACM
14 years 8 months ago
Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining
With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
DAC
2005
ACM
13 years 9 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...