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» Generating high performance pruned FFT implementations
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CODES
2004
IEEE
14 years 14 days ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
CCS
2010
ACM
13 years 9 months ago
TASTY: tool for automating secure two-party computations
Secure two-party computation allows two untrusting parties to jointly compute an arbitrary function on their respective private inputs while revealing no information beyond the ou...
Wilko Henecka, Stefan Kögl, Ahmad-Reza Sadegh...
ACSAC
2007
IEEE
14 years 3 months ago
Extending the Java Virtual Machine to Enforce Fine-Grained Security Policies in Mobile Devices
The growth of the applications and services market for mobile devices is currently slowed down by the lack of a flexible and reliable security infrastructure. The development and...
Iulia Ion, Boris Dragovic, Bruno Crispo
DATE
2007
IEEE
185views Hardware» more  DATE 2007»
14 years 3 months ago
An ILP formulation for system-level application mapping on network processor architectures
Current day network processors incorporate several architectural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to suppor...
Christopher Ostler, Karam S. Chatha
IROS
2007
IEEE
125views Robotics» more  IROS 2007»
14 years 3 months ago
Improved prediction of heart motion using an adaptive filter for robot assisted beating heart surgery
— Robot assisted heart surgery allows surgeons to operate on a heart while it is still beating as if it had been stopped. The robot actively cancels heart motion by closely follo...
Timothy J. Franke, Ozkan Bebek, Murat Cenk Cavusog...