Abstract. We introduce a collection of high performance kernels for basic linear algebra. The kernels encapsulate small xed size computations in order to provide building blocks fo...
This paper presents a methodology towards synthesis of high performance analog circuits. Layout parasitics are estimated and compensated during circuit sizing. Physical layout con...
—In this paper we describe QsNetIII , an adaptively routed network for High Performance Computing (HPC) applications. We detail the structure of the network, the evolution of our...
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
Dynamic languages typically allow programs to be written y high level of abstraction. But their dynamic nature makes it very hard to compile such languages, meaning that a price h...