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» Generation of BDDs from hardware algorithm descriptions
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ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
14 years 6 days ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 5 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
APPROX
2009
Springer
136views Algorithms» more  APPROX 2009»
14 years 2 months ago
Succinct Representation of Codes with Applications to Testing
Motivated by questions in property testing, we search for linear error-correcting codes that have the “single local orbit” property: i.e., they are specified by a single loca...
Elena Grigorescu, Tali Kaufman, Madhu Sudan
CIVR
2003
Springer
200views Image Analysis» more  CIVR 2003»
14 years 1 months ago
Multimedia Search with Pseudo-relevance Feedback
We present an algorithm for video retrieval that fuses the decisions of multiple retrieval agents in both text and image modalities. While the normalization and combination of evi...
Rong Yan, Alexander G. Hauptmann, Rong Jin
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 1 months ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic