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» Generation of BDDs from hardware algorithm descriptions
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DSD
2009
IEEE
124views Hardware» more  DSD 2009»
14 years 2 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
14 years 1 months ago
A First Step Towards Hw/Sw Partitioning of UML Specifications
This paper proposes a novel methodology tailored to design embedded systems, taking into account the emerging market needs, such as hw/sw partitioning, object-oriented specificati...
William Fornaciari, P. Micheli, Fabio Salice, L. Z...
ISMVL
2010
IEEE
195views Hardware» more  ISMVL 2010»
14 years 1 months ago
ESOP-Based Toffoli Network Generation with Transformations
In this paper a new Toffoli gate cascade synthesis method is presented. This method is based on previous work [12] and generates a cascade of inverted-control-Toffoli gates from t...
Yasaman Sanaee, Gerhard W. Dueck
CEC
2003
IEEE
13 years 11 months ago
A modified ant colony algorithm for evolutionary design of digital circuits
Evolutionary computation presents a new paradigm shift in hardware design and synthesis. According to this paradigm, hardware design is pursued by deriving inspiration from biologi...
Mostafa Abd-El-Barr, Sadiq M. Sait, Bambang A. B. ...
DATE
2006
IEEE
107views Hardware» more  DATE 2006»
14 years 1 months ago
Flexible specification and application of rule-based transformations in an automotive design flow
This paper addresses an XML-based design environment, which provides a powerful basis for the manipulation of hardware design descriptions. The contribution of the paper is a flex...
Jan-Hendrik Oetjens, Joachim Gerlach, Wolfgang Ros...