647 search results - page 46 / 130 » Generation of BDDs from hardware algorithm descriptions |
FLOPS
2010
Springer
14 years 2 months ago
2010
Springer
Abstract. We present the meta-theory behind the code generation facilities of Isabelle/HOL. To bridge the gap between the source (higherorder logic with type classes) and the many ...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
MICRO
2003
IEEE
14 years 1 months ago
2003
IEEE
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
DATE
1999
IEEE
14 years 7 days ago
1999
IEEE
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
ICALP
2009
Springer
14 years 8 months ago
2009
Springer
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...