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» Generation of BDDs from hardware algorithm descriptions
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ASPDAC
1995
ACM
79views Hardware» more  ASPDAC 1995»
13 years 11 months ago
Search space reduction in high level synthesis by use of an initial circuit
Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
Atsushi Masuda, Hiroshi Imai, Jeffery P. Hansen, M...
GECCO
2003
Springer
189views Optimization» more  GECCO 2003»
14 years 1 months ago
A Forest Representation for Evolutionary Algorithms Applied to Network Design
Abstract. Network design involves several areas of engineering and science. Computer networks, electrical circuits, transportation problems, and phylogenetic trees are some example...
Alexandre C. B. Delbem, André Carlos Ponce ...
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang
ICES
2003
Springer
151views Hardware» more  ICES 2003»
14 years 1 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...
ROBOCUP
1999
Springer
127views Robotics» more  ROBOCUP 1999»
14 years 8 days ago
CMUnited-99: Small-Size Robot Team
This paper describes the CMUnited-99 small-size robot team. The team builds on our previous RoboCup champion teams (’97 and ’98). The team reuses much of the hardware, percepti...
Manuela M. Veloso, Michael H. Bowling, Sorin Achim