68 search results - page 4 / 14 » Generation of compact test sets with high defect coverage |
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
ET
1998
13 years 7 months ago
1998
This paper explores the design of efficient test sets and test-pattern generators for online BIST. The target applications are high-performance, scalable datapath circuits for whi...
IFIP
2001
Springer
13 years 12 months ago
2001
Springer
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
ATS
1996
IEEE
13 years 11 months ago
1996
IEEE
A hierarchical test generation method is presented that uses the inherent hierarchical structure of the circuit under test and takes fault diagnosability into account right from t...
DATE
2002
IEEE
14 years 13 days ago
2002
IEEE
Deterministic observation and random excitation of fault sites during the ATPG process dramatically reduces the overall defective part level. However, multiple observations of eac...