A New ATPG Algorithm to Limit Test Set Size and Achieve Multiple Detections of All Faults

Deterministic observation and random excitation of fault sites during the ATPG process dramatically reduces the overall defective part level. However, multiple observations of each fault site lead to increased test set size and require more tester memory. In this paper, we propose a new ATPG algorithm to find a near-minimal test pattern set that detects faults multiple times and achieves excellent defective part level. This greedy approach uses 3-value fault simulation to estimate the potential value of each vector candidate at each stage of ATPG. The result shows generation of a close to minimal vector set is possible only using dynamic compaction techniques in most cases. Finally, a systematic method to trade-off between defective part level and test size is also presented.

• Type: Conference
• Year: 2002
• Where: DATE
• Authors: Sooryong Lee, Brad Cobb, Jennifer Dworak, Michael R. Grimaila, M. Ray Mercer
• Keywords: DATE 2002, Fault Site, Fault Site Lead, Hardware, Test Set Size