Sciweavers

68 search results - page 7 / 14
» Generation of compact test sets with high defect coverage
Sort
View
ICCAD
1994
IEEE
110views Hardware» more  ICCAD 1994»
13 years 11 months ago
Test pattern generation based on arithmetic operations
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signi cant area overhead and performance degradation...
Sanjay Gupta, Janusz Rajski, Jerzy Tyszer
COMPSAC
2010
IEEE
13 years 5 months ago
GenRed: A Tool for Generating and Reducing Object-Oriented Test Cases
An important goal of automatic testing techniques, including random testing is to achieve high code coverage with a minimum set of test cases. To meet this goal, random testing res...
Hojun Jaygarl, Kai-Shin Lu, Carl K. Chang
ETS
2006
IEEE
119views Hardware» more  ETS 2006»
14 years 1 months ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
14 years 1 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
ISSTA
2006
ACM
14 years 1 months ago
Test input generation for java containers using state matching
The popularity of object-oriented programming has led to the wide use of container libraries. It is important for the reliability of these containers that they are tested adequate...
Willem Visser, Corina S. Pasareanu, Radek Pel&aacu...