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AHS
2006
IEEE
86views Hardware» more  AHS 2006»
14 years 2 months ago
An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
ASPDAC
2005
ACM
116views Hardware» more  ASPDAC 2005»
13 years 10 months ago
A flexible framework for communication evaluation in SoC design
— We present SoCExplore, a framework for fast communicationcentric design space exploration of complex SoCs with networkbased interconnects. Speed-up in exploration is achieved t...
Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 3 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha
CORR
2010
Springer
198views Education» more  CORR 2010»
13 years 8 months ago
Space and the Synchronic A-Ram
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
Alexander Victor Berka
EWC
2000
105views more  EWC 2000»
13 years 8 months ago
Design Families and Design Individuals
: This paper discusses design families and design individuals. Phase space is introduced to complement state space. Phase transition as a generic method of generating design famili...
Xiao-Guang Shi, John S. Gero