Sciweavers

494 search results - page 44 / 99
» Generic Design Space Exploration for Reconfigurable Architec...
Sort
View
SAMOS
2004
Springer
14 years 2 months ago
Modeling Loop Unrolling: Approaches and Open Issues
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
João M. P. Cardoso, Pedro C. Diniz
IPPS
2006
IEEE
14 years 2 months ago
Automatic application-specific microarchitecture reconfiguration
Applications for constrained embedded systems are subject to strict time constraints and restrictive resource utilization. With soft core processors, application developers can cu...
Shobana Padmanabhan, Ron K. Cytron, Roger D. Chamb...
ICECCS
2009
IEEE
166views Hardware» more  ICECCS 2009»
13 years 6 months ago
ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs
In hard real-time systems such as avionics, computer board level designs are typically customized to meet specific reliability and real time requirements. This paper focuses on co...
Min-Young Nam, Rodolfo Pellizzoni, Lui Sha, Richar...
ISSS
2002
IEEE
176views Hardware» more  ISSS 2002»
14 years 1 months ago
Controller Estimation for FPGA Target Architectures during High-Level Synthesis
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
14 years 2 months ago
Design of a Single Event Upset (SEU) Mitigation Technique for Programmable Devices
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
Sajid Baloch, Tughrul Arslan, Adrian Stoica