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» Genetic algorithms with self-organized criticality for dynam...
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ISPD
2009
ACM
141views Hardware» more  ISPD 2009»
14 years 3 months ago
A faster approximation scheme for timing driven minimum cost layer assignment
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
Shiyan Hu, Zhuo Li, Charles J. Alpert
IPPS
2006
IEEE
14 years 2 months ago
Battery-aware router scheduling in wireless mesh networks
Wireless mesh networks recently emerge as a flexible, low-cost and multipurpose networking platform with wired infrastructure connected to the Internet. A critical issue in mesh ...
Chi Ma, Zhenghao Zhang, Yuanyuan Yang
JCO
2011
115views more  JCO 2011»
13 years 3 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 5 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
ICDAR
2011
IEEE
12 years 8 months ago
Tuning between Exponential Functions and Zones for Membership Functions Selection in Voronoi-Based Zoning for Handwritten Charac
— In Handwritten Character Recognition, zoning is rigtly considered as one of the most effective feature extraction techniques. In the past, many zoning methods have been propose...
Sebastiano Impedovo, Giuseppe Pirlo