Increasing miniaturization is posing multiple challenges to electronic designers. In the context of Multi-Processor System-onChips (MPSoCs), we focus on the problem of implementin...
Federico Angiolini, Paolo Meloni, Salvatore Carta,...
In this paper, we formulate the problem of topology constrained rectilinear block packing in layout reuse. A speci c class of rectilinear shaped blocks, ordered convex rectilinear...
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...
We consider the following well-known problem, which is called the edge-disjoint paths problem. Input: A graph G with n vertices and m edges, k pairs of vertices (s1, t1), (s2, t2)...
We prove that it is NP-complete to decide whether a bipartite graph of maximum degree three on nk vertices can be partitioned into n paths of length k. Finally, we propose some ap...