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» Graph Rewriting for Hardware Dependent Program Optimizations
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JEI
2006
162views more  JEI 2006»
13 years 7 months ago
Markovian segmentation and parameter estimation on graphics hardware
In this paper, we show how Markovian strategies used to solve well-known segmentation problems such as motion estimation, motion detection, motion segmentation, stereovision, and c...
Pierre-Marc Jodoin, Max Mignotte
TACO
2008
130views more  TACO 2008»
13 years 7 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
ISCAS
1994
IEEE
104views Hardware» more  ISCAS 1994»
13 years 11 months ago
A Graph-Theoretic Approach to Clock Skew Optimization
This paper addresses the problem of minimizing the clock period of a circuit by optimizingthe clock skews. We incorporate uncertainty factors and present a formulation that ensure...
Rahul B. Deokar, Sachin S. Sapatnekar
IEEEPACT
1999
IEEE
13 years 11 months ago
Cameron: High level Language Compilation for Reconfigurable Systems
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm...
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 3 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong