227 search results - page 15 / 46 » Graph Rewriting for Hardware Dependent Program Optimizations |
ISCAS
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper, we present the application of dynamic trellis diagrams (DTDs) to automatic translation of data flow graphs (DFGs) into highly optimized programs for digital signal ...
ISSS
1996
IEEE
13 years 11 months ago
1996
IEEE
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
ISSS
1997
IEEE
13 years 11 months ago
1997
IEEE
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases . There exists some tools that give an o...
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...