141 search results - page 6 / 29 » HYPER-LP: a system for power minimization using architectura... |
LCTRTS
1999
Springer
13 years 12 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
ICAC
2009
IEEE
14 years 2 months ago
2009
IEEE
Architectural monitoring and adaptation allows self-management capabilities of autonomic systems to realize more powerful adaptation steps, which observe and adjust not only param...
VRML
2005
ACM
14 years 1 months ago
2005
ACM
Web-based geometry transmission profits from a transmission system, which is both progressive and compressive. For this application, the wavelet transform has emerged as a suitab...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
Power-aware systems are those that must make the best use of available power. They subsume traditional low-power systems in that they must not only minimize power when the budget ...
DATE
2010
IEEE
14 years 24 days ago
2010
IEEE
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...